This book introduces the idea that most mismatches can be found by searching few bits of the search word of content addressable memories.A word circuit was divided into two sections that are sequentially scanned or pipelined.The second section is unused in most of match lines.It is very fast to search last two bits compared to searching all bits.In this work,each circuit is controlled by a locally generated timing signal rather than a global signal.

Dr.N.Saravanakumar had received BE degree in Electrical and Electronics Engineering from Madurai Kamaraj University, Tamil Nadu (2002). He received his ME Degree in VLSI Design from Anna University, Chennai, Tamil Nadu (2007).He completed doctorate degree in the area of low power VLSI Design from Anna University, Chennai, Tamil Nadu (2015).